State Machine Design with Programmable Logic
Date Submitted: 09/10/2006 00:45:08
1. Introduction
This experiment involves the design of circuitry to implement a data transmission system. Information is entered via a keypad, and transmitted via an infra-red light emitting diode (LED) to a receiver, where signals are then decoded and displayed. The aims of this experiment were to demonstrate the use of an Erasable Programmable Logic Device (EPLD) to implement digital circuitry and the use of logic analysers to observe digital circuitry.
Some modules of this experiment
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analyser.
There were also some errors involved in the transmission/reception process. However, we saw that by making some calculations and sampling at the optimum time, we reduced the receiver delay by about 160µs if we sampled SENSOR at 11 clock cycles after the arrival of the first data bit.
As a conclusion, EPLDs are convenient as we can internally modify the logic to make further improvements without having to introduce new circuitry.
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